Boolean algebra, wired up.
Gatelab takes a function from minimization all the way to a TTL circuit on a breadboard — then checks that what you built actually matches what you derived.
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Quine–McCluskey prime implicants compiled into 4-state gate networks
One job, in four stages
Each one hands its work to the next.
The last stage checks the first
This is the part that is not a K-map solver with a simulator bolted on. Verify sweeps every one of the 2ⁿ input combinations through the circuit you actually wired and diffs the results against the function you actually derived — row by row, naming the ones that disagree.
And when it fails it guesses why, because some mistakes have a shape: every output bit flipped means NAND where AND was wanted; a match under a column swap means two input wires crossed; an output that never changes means Vcc.
Derived
F = A·B′ + B·C
Built
7408 + 7432 + 7404
Checked
8 of 8 rows agree
Four decisions it does not compromise on
It knows the difference between 0 and nothing
Logic here is four-state — 0, 1, Z, X. A boolean simulator reads an unconnected input as false and tells you your circuit works. This one tells you the input is floating.
The chips are real chips
7400, 7402, 7404, 7474, 74LS76A, 74LS107A, 74175, and more — pinouts transcribed from the datasheets. The 7402's output really is on pin 1, the 74LS76A's supply really is on pins 5 and 13, and forgetting pin 14 really does stop the board.
A flip-flop powers up not knowing
Place one and it reads X, not 0 — a real one comes up in whichever state the metastability fell into. That is the entire reason every counter you have ever seen has a clear wired to it, and a simulator that started at zero would hide it.
Minimal is not hazard-free
The timing panel sweeps the inputs in Gray code with unit gate delay, so a static hazard shows up as a real glitch — and the redundant term the minimizer discarded is exactly the one that cures it.
Not sure where to start?
The manual covers the notation, every fault code, and how the verification bridge decides you got it wrong.